As you know I like FORTH a lot for control applications. I was estimating that with standard off the shelf hardware we might get a PID loop interval in the 4 KHz range.
However, there is a new kid on the block. The SEAforth 24B.
This kid is a screamer. It has 24 cores that each run at 1 G instructions per second (Ips). Peak of course is 24 G Ips.
For a PID loop that means loop cycle times in the 10 MHz to 50 MHz range. But that is not all:
* Static/dynamic memory interface
* Eleven SPI I/O ports
* Two 18-bit A/D converters
* Two 9-bit D/A converters
* 32 Parallel I/O lines
C18 Processor Features
* 18-bit stack oriented engine
* Runs VentureForth™ programming language as native code
* Executes 1 VentureForth instruction / ns
* 512 words RAM / 512 words ROM
* Hardware 18x18 multiply/accumulate
* Automatic sleep mode at <1mW dissipation
The multiplier will be very handy for PID loops. If you design your PID loops correctly they will consist of adds, subtracts, and a few multiplies.
Update 02 Sept 007 1023z
The A/D is a VCO and a counter. Which means conversion times on the order of 15 to 20 uSec. The D to A is a VCO type device as well.
What that means is that for actual high speed operation the SPI ports will probably be required.
In any case for low speed signals these ports should be fine.
Also the multiplier is actually a 9 bit by 9 bit bitwise hardware multiply. Nine or more clock cycles to complete a multiply. Some stack manipulation will be required to to do an 18 bit by 18 bit multiply. It will probably be somewhat slow. Probably 50 to 100 clock cycles. Meaning about 1E7 multiplies per second for each core. Which means that if you have one core for P one for I and one for D you could probably do a PID loop at a bit better than 5 million loops a second. If you cut down the number of bits to 12 or 14 you could tune the multiplies to make them faster.
Update 03 Aug 007 0743z
It appears the 24B is not currently being offered. The A version has the following specs:
* Twenty-four C18 core processors capable of combined sustained 24 Billion operations / second
* Completely asynchronous for faster processing and lower power
* Static/dynamic memory interface
* One SPI I/O port plus a broad set of serial and parallel ports
* Two 18-bit A/D converters
* Two 9-bit D/A converters
C18 Processor Features
* 18-bit stack oriented engine
* Runs VentureForth™ programming language as native code
* Executes 1 VentureForth instruction / ns
* 64 words RAM / 64 words ROM
* Automatic sleep mode at <1mW dissipation
A more detailed look at the chip can be found at SEAforth 24A.
Update: The SEAforth 24a pdf is no longer available by direct link. The above link now takes you to the page where you can order a copy.
Thursday, August 30, 2007
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